Huawei’s Peerium, UnifiedBus, & Chips: Great in some ways, behind in others

At Huawei Connect 2026 in Shanghai, rotating chairman Eric Xu and HiSilicon chief scientist Liao Heng argued that China’s chip self-sufficiency is inevitable and that linking many chips together matters more than any single chip.

The chips

  • Ascend 950PR launched first. It targets inference, and Xu said volume so far is not large.
  • Ascend 950DT is the training part. SuperPoDs built on it are in testing, with large-scale supply expected at the end of 2026 or early 2027. Xu said test results are good and that supply, not customer demand, is the constraint.
  • Ascend 960: Huawei says the 960DT is now due in Q1 2027 and the 960PR in Q3 2027, ahead of its original roadmap, with a 970 in 2028 and a 980 in 2029. Xu said the 960’s specifications match last year’s plan and that its progress depends on HBM memory.
  • Ascend 910C: Xu said Huawei has delivered more than 1,000 of its 384-chip supernodes. That figure comes from Huawei alone.

Xu was candid about where Huawei is weaker. Its single-chip designs are fine, he said, but they are held back by the manufacturing processes available in China. Huawei’s claimed edge is in connecting large numbers of chips, work he said began before US sanctions. On self-sufficiency, he said China cannot stay dependent on suppliers who may stop selling at any moment, and that having domestic chips, even somewhat less advanced ones, beats living with that risk.

Peerium and UnifiedBus

Peerium is Huawei’s name for an architecture meant to make up to a million processors behave as one computer, using nested parallelism, unified memory addressing and peer-to-peer links. UnifiedBus (UB) is the interconnect Huawei says makes that possible. Xu and Liao made these claims for it:

  • Up to 800 GB/s between racks. Xu contrasted this with Nvidia’s NVL72, which he put at 1.8 TB/s inside a rack and 0.2 TB/s once traffic leaves it.
  • About 150 nanoseconds to move a packet from a scale-up network to a scale-out network, versus at least microseconds when switching between two protocols such as NVLink and InfiniBand.
  • Higher model FLOPs utilization in training, which Xu said has been validated and is what leading model makers like most about the 950.

Huawei says a 256,000-card Atlas 950 SuperCluster is being deployed and tested. Liao tied the 200,000-to-256,000 scale to expected model sizes of 10 to 40 trillion parameters and to how much power a single data center campus can draw.

Optics: Hi-ONE and the NPO bet

Hi-ONE is a near-packaged optics (NPO) engine that Huawei says is the first with a built-in light source. It sits about five centimeters from the main chip, with copper covering only that last stretch. Xu said NPO costs nearly 40 percent less than co-packaged optics (CPO) and avoids scrapping the AI chip if the optics fail. He predicted no rival could match the module for two to three years. Liao said the main obstacle to all-optical links is reliability, and that most vendors use an external laser feeding 32 channels, which creates power and coupling problems.

Supply, overseas sales and Malaysia

Xu said China’s bottleneck mirrors the global one: optical modules and memory are in severe shortage. He expects global supply and demand to balance around 2029, with China later. Because Huawei cannot meet Chinese demand, he said, it has no plan for a full international push and supplies only a few countries in small volumes. Asked about Malaysia, he said customers choose Huawei for geopolitical and multi-vendor reasons. Bloomberg reports that Malaysia is evaluating the 910C, not the 950, for a sovereign AI project worth about RM2 billion, and that it has not decided.

What holds up and what doesn’t

ClaimStatusNote
Huawei can’t meet Chinese demand; 950DT tests went wellConfirmed as saidReuters independently reported Xu’s remarks. That confirms what he said, not that it is true.
Ascend has passed Nvidia in ChinaUnsupported by dataThe Chinese original hedges (Ascend should have passed Nvidia). Huawei’s English transcript drops the hedge. Huawei gave no data. Bernstein forecasts Nvidia near 8 percent in 2026, but that is a projection, not a measurement.
256,000-card Atlas 950 SuperClusterConflicts with 2025Huawei announced over 500,000 NPUs for this cluster in 2025, built from 64 SuperPoDs of 8,192 chips. Why the number halved is not explained.
Atlas 960 SuperPoD scaleConflicts with 20252025 plan: 15,488 chips. This year’s 960 supernode: up to 4,096.
RMB 1.8 trillion R&D, 2007–2025Probably just careless DaveHuawei’s audited reports give over RMB 240 billion for the decade to 2015 and RMB 1.382 trillion for the decade to 2025. Together that is about RMB 1.62 trillion.
Hi-ONE bandwidth of 7.2 TB/sLikely wrong unitTerabits per second is almost certainly right. The OIF’s related NPO project is specified in Tbps.
NVL72 drops to 0.2 TB/s outside the rackIncompleteNvidia documents NVLink domains of up to 576 GPUs, and its 2023 DGX GH200 linked 256 superchips over NVLink.
40 vendors back NPO at the OIFSingle-sourcedThe OIF NPO project is real. The vendor count comes only from Huawei.
960DT date moved upOriginal date disputedHuawei’s roadmap implies Q4 2027 as the original date. Some coverage says Q3 2027.

Most claims in the transcript are subject-authored: Huawei executives describing Huawei products, volumes and competitors. The roadmap dates, supernode shipments, UB bandwidth and latency figures, and NPO cost advantage have no independent confirmation.

Sources

Leave a Comment

Your email address will not be published. Required fields are marked *

Scroll to Top